Lcd Ram Address Area; Lcd Display Data Ram Organization; Lcd Clock Signal Frame Frequency - Samsung S3C8275X User Manual

8-bit cmos microcontrollers
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S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X

LCD RAM ADDRESS AREA

RAM addresses of page 2 are used as LCD data memory. When the bit value of a display segment is "1", the
LCD display is turned on; when the bit value is "0", the display is turned off.
Display RAM data are sent out through segment pins SEG0−SEG31 using a direct memory access (DMA)
method that is synchronized with the f
display can be allocated to general-purpose use.
b0 b4 b0 b4 b0 b4 b0 b4 b0 b4
COM0
b1 b5
COM1
b2 b6
COM2
b3 b7
COM3
200H 201H 202H 203H 204H
LCDCK Frequency (f
64 Hz
128 Hz
256Hz
512 Hz
signal. RAM addresses in this location that are not used for LCD
LCD
b1 b5
b1 b5
b1 b5
b1 b5
b2 b6
b2 b6
b2 b6
b2 b6
b3 b7
b3 b7
b3 b7
b3 b7
Figure 13-3. LCD Display Data RAM Organization
Table 13-1. LCD Clock Signal Frame Frequency
)
Static
LCD
64
128
256
512
b0 b4 b0 b4 b0 b4
b1 b5
b2 b6
b3 b7
20DH 20EH 20FH
1/2 Duty
1/3 Duty
32
21
64
43
128
85
256
171
LCD CONTROLLER/DRIVER
b1 b5
b1 b5
b2 b6
b2 b6
b3 b7
b3 b7
1/4 Duty
16
32
64
128
13-3

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