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S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X
TACON
— Timer 1/A Control Register
Bit Identifier
Reset Value
Read/Write
Addressing Mode
.7
.6–.4
.3
.2
.1
.0
.7
.6
0
0
R/W
R/W
Register addressing mode only
Timer 1 Operating Mode Selection Bit
0
Two 8-bit timers mode (timer A/B)
1
One 16-bit timer mode (timer 1)
Timer 1/A Clock Selection Bits
0
0
0
fxx/512
0
0
1
fxx/256
0
1
0
fxx/64
0
1
1
fxx/8
1
0
0
fxx (system clock)
1
0
1
fxt (sub clock)
1
1
0
T1CLK (external clock)
1
1
1
Not available
Timer 1/A Counter Clear Bit
0
No effect
1
Clear the timer 1/A counter (when write, automatically cleared to "0" after being
cleared basic timer counter)
Timer 1/A Counter Operating Enable Bit
0
Disable counting operation
1
Enable counting operation
Timer 1/A Interrupt Enable Bit
0
Disable interrupt
1
Enable interrupt
Timer 1/A Interrupt Pending Bit
0
No interrupt pending (when read), clear pending bit (when write)
1
Interrupt is pending (when read)
.5
.4
0
0
R/W
R/W
R/W
CONTROL REGISTER
E6H
Set 1, Bank 1
.3
.2
.1
0
0
0
R/W
R/W
.0
0
R/W
4-45
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