Usb-To-Uart Bridge - Xilinx KC705 User Manual

Table 1-18: Ethernet PHY Connections (Cont'd)
Details about the tri-mode Ethernet MAC core are provided in PG051, LogiCORE IP
Tri-Mode Ethernet MAC User Guide.
For more information about the Marvell 88E1111 see
For more information about the ICS 844021-01 see

USB-to-UART Bridge

[Figure
The KC705 board contains a Silicon Labs CP2103GM USB-to-UART bridge device (U12)
which allows a connection to a host computer with a USB port. The USB cable is supplied
in the Evaluation Kit (standard-A plug to host computer, mini-B plug to KC705 board
connector J6). The CP2103GM is powered by the USB 5V provided by the host PC when the
USB cable is plugged into the USB port on the KC705 board.
Xilinx UART IP is expected to be implemented in the FPGA fabric. The FPGA supports the
USB-to-UART bridge using four signal pins: Transmit (TX), Receive (RX), Request to Send
(RTS), and Clear to Send (CTS).
Silicon Labs provides royalty-free Virtual COM Port (VCP) drivers for the host computer.
These drivers permit the CP2103GM USB-to-UART bridge to appear as a COM port to
communications application software (for example, TeraTerm or HyperTerm) that runs on
the host computer. The VCP device drivers must be installed on the host PC prior to
establishing communications with the KC705 board.
Table 1-19
KC705 Evaluation Board
UG810 (v1.3) May 10, 2013
FPGA Pin Schematic
(U1) Net Name
N29 PHY_TXER
PHY_TXCTL_T
M27
XEN
N27 PHY_TXD0
N25 PHY_TXD1
M29 PHY_TXD2
L28 PHY_TXD3
J26 PHY_TXD4
K26 PHY_TXD5
L30 PHY_TXD6
J28 PHY_TXD7
J4 SGMII_TX_P
J3 SGMII_TX_N
H6 SGMII_RX_P
H5 SGMII_RX_N
1-2, callout 17]
shows the USB signal definitions at J6.
www.xilinx.com
M88E1111
(U37)
Pin Number Pin Name
F2 TXER
E1 TXEN
F1 TXD0
G2 TXD1
G3 TXD2
H2 TXD3
H1 TXD4
H3 TXD5
J1 TXD6
J2 TXD7
A3 SIN_P
A4 SIN_N
A7 SOUT_P
A8 SOUT_N
[Ref 4].
[Ref 3].
Feature Descriptions
39