Usb-To-Uart Bridge - Xilinx VC709 User Manual

Chapter 1: VC709 Evaluation Board Features
Table 1-14: SFP+ Module Control and Status (Cont'd)
SFP+ Module 2 (P2)
SFP+ Module 3 (P4)
SFP+ Module 4 (P5)
Note:

USB-to-UART Bridge

[Figure
The VC709 board contains a Silicon Labs CP2103GM USB-to-UART bridge device (U44)
which allows a connection to a host computer with a USB port. The USB cable is supplied
in the VC709 evaluation kit (type-A end to host computer, type mini-B end to VC709 board
connector J17). The CP2103GM is powered by the USB 5V provided by the host PC when
the USB cable is plugged into the USB port on the VC709 board.
Xilinx UART IP is expected to be implemented in the FPGA fabric. The FPGA supports the
USB-to-UART bridge using four signal pins: Transmit (TX), Receive (RX), Request to Send
(RTS), and Clear to Send (CTS).
40
XCVX690T (U1) Pin
AB41
AA39
AA42
AB38
AB39
AA40
Y42
AA41
AC39
AD42
AE42
AD38
AC38
AE38
AC41
AE39
AE40
AD40
AC40
The six control/status signals to/from each SFP+ connector are routed through a level shifter.
1-2, callout 13]
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Net Name
SFP1_TX_DISABLE
SFP2_TX_FAULT
SFP2_MOD_DETECT
SFP2_RS0
SFP2_RS1
SFP2_LOS
SFP2_TX_DISABLE
SFP3_TX_FAULT
SFP3_MOD_DETECT
SFP3_RS0
SFP3_RS1
SFP3_LOS
SFP3_TX_DISABLE
SFP4_TX_FAULT
SFP4_MOD_DETECT
SFP4_RS0
SFP4_RS1
SFP4_LOS
SFP4_TX_DISABLE
SFP+ Module
Pin Number Pin Name
3 TX_DISABLE
2 TX_FAULT
6 MOD_ABS
7 RS0
9 RS1
8 LOS
3 TX_DISABLE
2 TX_FAULT
6 MOD_ABS
7 RS0
9 RS1
8 LOS
3 TX_DISABLE
2 TX_FAULT
6 MOD_ABS
7 RS0
9 RS1
8 LOS
3 TX_DISABLE
VC709 Evaluation Board
UG887 (v1.0) February 4, 2013