Motorola CPU32 Reference Manual page 153

Hide thumbs Also See for CPU32:
Table of Contents

Advertisement

MOVES
Operation:
Assembler:
Attributes:
Description:
register to a location within the address space specified by the destination function
code (DFC) register; or moves the byte, word, or long operand from a location within
the address space specified by the source function code (SFC) register to the speci-
fied general register.
If the destination is a data register, the source operand replaces the correspond-
ing low-order bits of the data register, depending on the size of the operation. If
the destination is an address register, the source operand is sign-extended to 32
bits and then loaded into the address register.
Condition Codes:
Not affected.
Instruction Format:
15
14
13
0
0
0
A/D
REGISTER
Instruction Fields:
Size field — Specifies the size of the operation:
00 — Byte operation
01 — Word operation
10 — Long operation
CPU32
REFERENCE MANUAL
Move Address Space
(Privileged Instruction)
If supervisor state
then Rn → Destination [DFC] or Source [SFC] → Rn
else TRAP
MOVES Rn, 〈ea〉Syntax:
MOVES 〈ea〉, Rn
Size = (Byte, Word, Long)
Moves the byte, word, or long operand from the specified general
12
11
10
9
0
1
1
1
dr
0
0
INSTRUCTION SET
8
7
6
5
0
SIZE
0
0
0
0
MOVES
4
3
2
1
EFFECTIVE ADDRESS
MODE
REGISTER
0
0
0
0
MOTOROLA
0
0
4-105

Advertisement

Table of Contents
loading

Table of Contents