Figure 8: Spi Communication Signals - Honeywell ISA100 Gen X User Manual

The Sensor Board being the slave does not have the ability to initiate a communication
exchange. Therefore, when the Sensor board has data to send to the Radio, it asserts the Sensor
Data Ready (SDR) line as an interrupt to the Radio. When time permits, the Radio initiates a
data transfer, and clocks the data in both the directions. The Radio board checks the type or
length byte of the sensor message and continues to transfer SPI bytes (NULL bytes) until all the
sensor message bytes are transferred.
The Sensor and the Radio can pass the data at the same time. However, this functionality
supported by the SPI interface is not used in the current design.
Packet checking
A 2-byte CRC-16 is used in the SPI physical layer packet along with a 0x5A sync byte for
checking the packet integrity.
Inter-packet delay
After a packet is transferred to or from the Sensor board, there is a lag, during which the
Sensor reprioritizes its outgoing packets and processes any data that is received. During this
time, the SPI is in an idle state. Radio places a fixed 10 msec delay between the packets to
guarantee that the Sensor is ready for the next packet.
Release Independent
April 2018

Figure 8: SPI Communication Signals

ISA100 Gen X Radio Module User's Guide
Honeywell
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