Motorola CPU32 Reference Manual page 7

Paragraph
Number
3.4.2
3.4.2.1
3.4.2.2
3.4.2.3
3.4.2.4
3.4.2.5
3.4.2.6
3.4.3
3.4.3.1
3.4.3.2
3.4.3.3
3.4.3.4
3.4.3.5
3.4.3.6
3.4.4
3.5
3.5.1
3.5.2
3.6
3.7
3.7.1
3.7.2
3.7.3
4.1
4.1.1
4.1.1.1
4.1.1.2
4.1.2
4.2
4.2.1
4.3
4.3.1
4.3.2
4.3.3
4.3.4
4.3.5
4.3.6
4.3.7
4.3.8
4.3.9
4.3.10
MOTOROLA
vi
TABLE OF CONTENTS (Continued)
Title
Page
Number
Memory Addressing Modes .................................................................. 3-4
Address Register Indirect ................................................................. 3-5
Address Register Indirect with Postincrement.. ............................ 3-5
Address Register Indirect with Predecrement .............................. 3-5
Address Register Indirect with Displacement.. ............................. 3-6
Address Register Indirect with Index (8-Bit Displacement) ........ 3-6
Address Register Indirect with Index (Base Displacement) ....... 3-8
Special Addressing Modes .................................................................. 3-8
Program Counter Indirect with Displacement.. ............................. 3-8
Program Counter Indirect with Index (8-Bit Displacement) ........ 3-9
Program Counter Indirect with Index (Base Displacement) ....... 3-9
Absolute Short Address .................................................................... 3-1 0
Absolute Long Address .................................................................... 3-11
Immediate Data .................................................................................. 3-11
Effective Address Encoding Summary ............................................... 3-12
Programming View of Addressing Modes .............................................. 3-14
Addressing Capabilities ........................................................................ 3-15
General Addressing Mode Summary ................................................. 3-16
M68000 Family Addressing Capability ................................................... 3-18
Other Data Structures : ............................................................................... 3-19
System Stack .......................................................................................... 3-19
User Stacks ............................................................................................. 3-20
Queues ..................................................................................................... 3-21
Section 4
Instruction Set
M68000 Family Compatibility .................................................................. .4-1
New Instructions ..................................................................................... 4-2
Low-Power STOP (LPSTOP) ......................................................... .4-2
Table Lookup and Interpolate (TBL) ............................................. .4-2
Unimplemented Instructions ................................................................ .4-2
Instruction Format ....................................................................................... 4-3
Notation .................................................................................................... 4-4
Instruction Summary .................................................................................. 4-6
Condition Code Register ....................................................................... 4-6
Data Movement Instructions ................................................................ .4-8
Integer Arithmetic Operations .............................................................. .4-9
Logical Instructions ................................................................................ 4-11
Shift and Rotate Instructions ................................................................ .4-11
Bit Manipulation Instructions ............................................................... .4-12
Binary-Coded Decimal (BCD) Instructions ........................................ 4-13
Program Control Instructions ............................................................... .4-13
System Control Instructions ................................................................. .4-15
Condition Tests ....................................................................................... 4-17
CPU32 REFERENCE MANUAL