Instruction Summary; Condition Code Register - Motorola CPU32 Reference Manual

II
4.3 Instruction Summary
The instructions form a set of tools to perform the following operations:
Data movement
Integer arithmetic
Logic
Shift and rotate
Bit manipulation
Binary-coded decimal arithmetic
Program control
System control
The complete range of instruction capabilities combined with the addressing
modes described previously provide flexibility for program development.
4.3.1 Condition Code Register
The condition code register portion of the status register contains five bits that
indicate the result of a processor operation. Table 4-1 lists the effect of each
instruction on these bits. The carry bit and the multiprecision extend bit are
separate in the M68000 Family to simplify programming techniques that use
them. Refer to Table 4-5 as an example.
Table 4-1. Condition Code Computations
Operations
ABCD
ADD, ADDI, ADDQ
ADDX
AND, ANDI, EOR, EORI,
MCVEQ, MOVE, OR,
ORI,
CLR, EXT, NOT, TAS,
TST
CHK
CHK2, CMP2
SUB, SUBI, SUBQ
MOTOROLA
4-6
X
*
*
*
-
-
-
*
N Z V C Special Definition
U
?
U
?
C = Decimal Carry
Z=Z.Rm ..... RO
V =Sm .Dm .Rm
+
Sm. Om .Rm
* *
? ?
C = Sm • Dm
+
Rm • Dm
+
Sm • Rm
V = Sm • Dm • Rm
+
Sm. Om • Rm
*
?
? ?
C = Sm • Dm
+
Rm • Dm
+
Sm • Rm
Z=Z.Rm ..... RO
* *
a
0
*
U U U
Z = (R = LB)
+
(R = UB)
U
?
U
?
C = (LB ::;; UB) • (IR
<
LB)
+
(R> UB)
+
(UB
<
LB) • (R> UB) • (R
<
LB)
V = Sm • Dm • Rm
+
Sm • Dm • Rm
* *
? ?
C = Sm • Dm
+
Rm • Dm
+
Sm • Rm
INSTRUCTION SET
CPU32 REFERENCE MANUAL