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SECTION 5
PROCESSING STATES
This section describes the processing states of the CPU32.
It includes a
functional description of the bits in the supervisor portion of the status register
and an overview of actions taken by the processor in response to exception
conditions.
5.1 State Transitions
The processor is in normal, background, or exception state unless halted.
When the processor fetches instructions and operands or executes instructions,
it is in the normal processing state. The stopped condition, which the processor
enters when a STOP or LPSTOP instruction is executed, is a variation of the
normal state in which no further bus cycles are generated.
Background state is an alternate operational mode used for system debugging.
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Refer to SECTION 7 DEVELOPMENT SUPPORT for more information.
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Exception processing refers specifically to the transition from normal processing
of a program to normal processing of system routines, interrupt routines, and
other exception handlers. Exception processing includes the stack operations,
the exception vector fetch, and the filling of the instruction pipeline caused by an
exception. Exception processing ends when execution of an exception handler
routine begins.
Refer to SECTION 6 EXCEPTION PROCESSING for
comprehensive information.
A catastrophic system failure occurs if the processor detects a bus error or
generates an address error while in the exception processing state. This type of
failure halts the processor. For example, if a bus error occurs during exception
processing caused by a bus error, the CPU32 assumes that the system is not
operational and halts.
The halted condition should not be confused with the stopped condition. After
the processor executes a STOP or LPSTOP instruction, execution of
instructions can resume when a trace, interrupt, or reset exception occurs.
CPU32 REFERENCE MANUAL
PROCESSING STATES
MOTOROLA
5-1
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