Motorola CPU32 Reference Manual page 348

M68300 series central processor unit
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8.3.7 Binary-Coded Decimal and Extended Instructions
The binary-coded decimal and extended instruction table indicates the number
of clock periods needed for the processor to perform the specified operation
using the specified addressing mode.
No additional tables are needed to
calculate total effective execution time for these instructions. The total number
of clock cycles is outside the parentheses. The numbers inside parentheses
(r/p/w) are included in the total clock cycle number. All timing data assumes
two-clock reads and writes.
Instruction
Head
ABCD
ABCD
SBCD
SBCD
ADDX
ADDX
SUBX
SUBX
CMPM
CPU32 REFERENCE MANUAL
Dn,Dm
2
-(An), -(Am)
2
Dn,Dm
2
-(An), -(Am)
2
Dn,Dm
0
-(An), -(Am)
2
Dn,Dm
0
-(An), -(Am)
2
(An)+, (Am)+
1
INSTRUCTION EXECUTION
TIMING
Tall
0
2
0
2
0
2
0
2
0
Cycles
4(0/1/0)
12(2/1/1 )
4(0/1/0)
12(2/1/1)
2(0/1/0)
10(2/1/1 )
2(0/1/0)
10(2/1/1 )
8(2/1/0)
MOTOROLA
8-21
E

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