Motorola DSP56156 Manual page 49

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
* * * *
* = Reserved, read as a zero, write as zero to insure compatibility
Table 1-8
Operating Mode Summary — PRAM Part
Operating M M
Mode B A
Special 0 0 Bootstrap from an external
Bootstrap 1 byte-wide memory located
at P:$C000
Special 0 1 Bootstrap from the Host port
Bootstrap 2 or SSI0
Normal 1 0 Internal PRAM enabled
Expanded External reset at P:$E000
Development 1 1 Internal program RAM
Expanded disabled; External reset at
P:$000
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PROGRAMMING MODEL
OMR
* * * * CD SD R SA * MC MB MA
Figure 1-12 Operating Mode Register
Description
DSP56156 OVERVIEW
Operating Mode
Mode Control for Bus Arbitration
Reserved
Saturation
Rounding
Stop Delay
Clockout Disable
Reserved
Table 1-9
Operating Mode Summary — PROM Part
Operating M M
Mode B A
Single Chip 0 0 Internal PROM enabled
Internal Reset at P:$0000
Reserved 0 1 Reserved
Normal 1 0 Internal PROM enabled
Expanded External reset at P:$E000
Development 1 1 Internal PROM disabled
Expanded External reset at P:$0000
Description
MOTOROLA