Toshiba H1 Series Data Book page 616

32bit micro controller tlcs-900/h1 series
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Table 3.23.1 Relationships between Analog Input Channels and AD Conversion Result Registers
Analog Input Channel
(Port G)
AN0
AN1
AN2
AN3
AN4
AN5
Note: For detect a overrun error thoroughly, read the AD conversion result register high at first and
read the AD conversion result register low at second. If OVRn="0" and ADRnRF="1", a
correct conversion result was obtained.
3.23.2.9
Data Polling
When the results of AD conversion are processed by means of data polling without
using interrupts, ADMOD0<EOS> should be polled. After confirming ADMOD0
<EOS>="1", read the AD conversion result register.
AD Conversion Result Registers
Conversion Modes
other than at right
(every fourth conversion)
ADREG0H/L
ADREG1H/L
ADREG2H/L
ADREG3H/L
ADREG4H/L
ADREG5H/L
92CZ26A-613
Channel Fixed Repeat
Conversion Mode
ADREG0H/L
ADREG1H/L
ADREG2H/L
ADREG3H/L
TMP92CZ26A

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