Toshiba H1 Series Data Book page 228

SDCLK
SDCKE
SDLUDQM
SDLLDQM
SDCS
SDRAS
SDCAS
SDWE
A10
RA
A15-A0
RA
D15-D0
tRCD=
1CLK
Bank
Active
SDCLK
SDCKE
SDLUDQM
SDLLDQM
SDCS
SDRAS
SDCAS
SDWE
A10
RA
A15-A0
RA
D15-D0
tRCD=
1CLK
Bank
Active
4CLK
CA (n)
D (n)
CAS Latency=2CLK
Read Read
Figure3.10.2 1-Word Read Cycle Timing
4CLK 1CLK
CA (n)
D (n) D (n+2)
CAS Latency=2CLK
Read
Figure3.10.3 Full-Page Read Cycle Timing
92CZ26A-225
3CLK 3CLK
CA (n+2)
D (n+2)
CAS Latency=2CLK CAS Latency=2CLK
Read
1CLK Burst Stop Cycle 2CLK
D (n+4) D(dmy)
Burst Stop
TMP92CZ26A
CA (n+4)
D (n+4)
A10
A15-0
D (dmy)