Toshiba H1 Series Data Book page 545

32bit micro controller tlcs-900/h1 series
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Memory Map Image and Data Output in Each Display Mode
STN monochrome (1-pixel display data = 1-bit memory data)
Display Memory
Address 0
LSB
D0
0
1
2 3
4 5 6
LD Bus Output
8-bit type
0 → 8 ...
LD0
1 → 9 ...
LD1
2 → 10 ...
LD2
3 → 11 ...
LD3
4 → 12 ...
LD4
5 → 13 ...
LD5
6 → 14 ...
LD6
7 → 15 ...
LD7
Note: When setting 240 segment, 256 segment size of data is required.
●STN 4-grayscale (1-pixel display data = 2-bit memory data)
Display Memory
Address 0
LSB
D0
0
1
2 3
4 5 6
LD Bus Output
8-bit type
1 - 0 → 17-16 ...
LD0
3 - 2 → 19-18 ...
LD1
5 - 4 → 21-20 ...
LD2
7- 6 → 23-22 ...
LD3
9- 8 → 25-24 ...
LD4
11-10 → 27-26 ...
LD5
13-12 → 29-28 ...
LD6
15-14 → 31-30 ...
LD7
Figure 3.19.2 Memory Map Image and Data Output in STN Monochrome/4-Grayscale Mode
Address 1
7
8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Address 1
7
8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Address 2
Address 2
92CZ26A-542
TMP92CZ26A
Address 3
MSB
D31
Address 3
MSB
D31

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