Toshiba H1 Series Data Book page 482

3.17.2 SFR
SFR of SPIC are as follows.These area connected to CPU with 16 bit data bus.
(1) SPIMD(SPI Mode setting register)
SPIMD register is for operation mode or clock etc.
bit Symbol
SWRST
SPIMD
Read/Write
(820H)
After Reset
Software
Prohibit to
Reset
Read
Modify
0: don't care
Function
Write
1: Reset
bit Symbol
LOOPBACK
Read/Write
(821H)
After Reset
LOOPBACK
Test mode
0:disbale
Function
1:enable
Note: Maximum speed of this SD card is 20Mbps in SD card SPI mode.
When setting the baud rates, select less than 20Mbps according to the operation speed of CPU (f
(a) <LOOPBACK>
Because Internal SPDO can be input to internal SPDI, it can be used as test.
Set <XEN>=1 and <LOOPBACK>=1, outputs clock from SPCLK pin regardless of
operation of transmit/receive.
Please change the setting when transmitting/receiving is not in operation.
(b) <MSB1ST>
Select the start bit of transmit/receive data
Please don't change the setting of this register when transmitting/receiving is in
operation.
SPIMD Register
7 6 5
XEN
W R/W
0 0
SYSCK
0: disable
1: enable
15 14 13
MSB1ST DOSTAT
R/W
0 1 1
Start bit for SPDO pin
Transmit / state
Receive (no transmit)
0:LSB 0:fixed to "0"
1:MSB 1:fixed to "1"
Figure 3.17.2 SPIMD register
Transmitting data
Receiving data
SPIMD<LOOPBACK>
Figure 3.17.3 <LOOPBACK> Function
92CZ26A-479
4 3
CLKSEL2
Select Baud Rate(Note1)
000:Reserved
001: f
010: f
011: f
12 11 10
TCPOL RCPOL
0
Synchronous Synchronous
clock edge clock edge
during during
transmitting receiving
0: fall 0: fall
1: rise 1: rise
SPDO pin
B
Y
A
SPDI pin
TMP92CZ26A
2 1 0
CLKSEL1 CLKSEL0
R/W
1 0 0
100:f /8
SYS
/2 101: f /16
SYS SYS
/3 110: f /64
SYS SYS
/4 111: f /256
SYS SYS
9 8
TDINV RDINV
R/W
0 0 0
Invert data Invert data
During During
transmitting receiving
0: disable 0: disable
1: enable 1: enable
).
SYS