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bit Symbol
PF7
PF
(003CH)
Read/Write
R/W
After reset
bit Symbol
PFCR
(003EH)
Read/Write
After reset
Function
bit Symbol
PF7F
PFFC
Read/Write
(003FH)
After reset
0: Port
Function
1: SDCLK
bit Symbol
PF7D
PFDR
(008FH)
Read/Write
After reset
Function
PF2 setting
<PF2C>
0
<PF2F>
Input port
0
I2S0WS output
1
PF5 setting
<PF5C>
0
<PF5F>
Input port
0
I2S1WS output
1
Note 1: Read-Modify-Write is prohibited for the registers PFCR, PFFC and PFFC2.
7
6
5
PF5
1
Data from external port (Output latch register is set to "1")
Port F control register
7
6
5
PF5C
0
Port F function register
7
6
5
PF5F
W
1
0
Port F drive register
7
6
5
PF6D
PF5D
1
1
1
Input/Output buffer drive register for standby mode
PF1 setting
<PF1C>
1
<PF1F>
Output port
0
1
PF4 setting
<PF4C>
1
<PF4F>
Output port
0
1
Figure 3.7.28 Register for Port F
92CZ26A-142
Port F register
4
3
PF4
PF3
R/W
4
3
PF4C
PF3C
W
0
0
Refer to following table
4
3
PF4F
PF3F
W
0
0
Refer to following table
4
3
PF4D
PF3D
R/W
1
1
0
1
Input port
Output port
I2S0DO output
0
1
Input port
Output port
I2S1DO output
TMP92CZ26A
2
1
0
PF2
PF1
PF0
2
1
0
PF2C
PF1C
PF0C
0
0
0
2
1
0
PF2F
PF1F
PF0F
0
0
0
2
1
0
PF2D
PF1D
PF0D
1
1
1
PF0 setting
<PF0C>
0
<PF0F>
Input port
Output port
0
I2S0CKOoutput
1
PF3 setting
<PF3C>
0
<PF3F>
Input port
Output port
0
I2S1CKOoutput
1
1
1
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