Toshiba TLCS-900/L1 Series Manual page 260

Original cmos 16-bit microcontroller
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m. Releasing the HALT mode by requesting an interruption
Usually, interrupts can release all halts status. However, the interrupts (
INT3, INTRTC, INTALM0 to INTALM4) which can release the HALT mode may not be
able to do so if they are input during the period CPU is shifting to the HALT mode (for
about 5 clocks of f
FPH
(In this case, an interrupt request is kept on hold internally.)
If another interrupt is generated after it has shifted to HALT mode completely, halt
status can be released without difficulty. The priority of this interrupt is compared with
that of the interrupt kept on hold internally, and the interrupt with higher priority is
handled first followed by the other interrupt.
) with IDLE1 or STOP mode (IDLE2 is not applicable to this case).
91C824-258
TMP91C824
, INT0 to
NMI
2008-02-20

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