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3.9.2
Operation of Each Circuit
(1) Prescaler
There is a 6-bit prescaler for generating a clock to SIO0. The clock selected using
SYSCR<PRCK1:0> is divided by 4 and input to the prescaler as φT0. The prescaler
can be run by selecting the baud rate generator as the serial transfer clock.
Table 3.9.2 shows prescaler clock resolution into the baud rate generator.
Table 3.9.2 Prescaler Clock Resolution to Baud Rate Generator
Select System
Select Prescaler
Clock
SYSCR1
<SYSCK>
<PRCK1:0>
1 (fs)
0 (fc)
X: Don't care, −: Cannot be used
The baud rate generator selects between 4-clock inputs: φT0, φT2, φT8, and φT32
among the prescaler outputs.
Gear Value
Clock
SYSCR1<GEAR2:0>
SYSCR0
XXX
000 (fc)
00
001 (fc/2)
(f
)
010 (fc/4)
FPH
011 (fc/8)
100 (fc/16)
10
XXX
(fc/16 clock)
91C824-125
Prescaler Output Clock Resolution
φT0
φT2
φT8
2
4
6
2
/fs
2
/fs
2
/fs
2
4
6
2
/fc
2
/fc
2
/fc
3
5
7
2
/fc
2
/fc
2
/fc
4
6
8
2
/fc
2
/fc
2
/fc
5
7
9
2
/fc
2
/fc
2
/fc
6
8
10
2
/fc
2
/fc
2
/fc
−
8
10
2
/fc
2
/fc
TMP91C824
φT32
8
2
/fs
8
2
/fc
9
2
/fc
10
2
/fc
11
2
/fc
12
2
/fc
12
2
/fc
2008-02-20
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