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Appendix B
Programming Reference
This reference for programmers includes a table showing the addresses of all DSP
memory-mapped peripherals, an exception priority table, and programming sheets for the
major programmable DSP registers. The programming sheets are grouped in the following
order: central processor, Phase Lock Loop (PLL), Host Interface (HI08), Enhanced
Synchronous Serial Interface (ESSI), Serial Communication Interface (SCI), Timer, and
GPIO. Each sheet provides room to write in the value of each bit and the hexadecimal value
for each register. You can photocopy these sheets and reuse them for each application
development project. For details on the instruction set of the DSP56300 family of DSPs, see
the DSP56300 Family Manual.
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Table B-2, Internal I/O Memory Map (X Data Memory), on page B-3 lists the
memory addresses of all on-chip peripherals.
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Table B-3, Interrupt Sources, on page B-8 lists the interrupt starting addresses and
sources.
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Table B-4, Interrupt Source Priorities Within an IPL, on page B-10 lists the priorities
of specific interrupts within interrupt priority levels.
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The programming sheets appear in this manual as figures (listed in Table B-1); they
show the major programmable registers on the DSP56303.
Programming Reference
B-1
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