Motorola DSP56303 User Manual page 48

24-bit digital signal processor
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Enhanced Synchronous Serial Interface 1 (ESSI1)
Table 2-13. Enhanced Synchronous Serial Interface 1 (ESSI1) (Continued)
Signal
Type
Name
SCK1
Input/Output
PD3
Input or
Output
SRD1
Input
PD4
Input or
Output
STD1
Output
PD5
Input or
Output
Note: 1. The Wait processing state does not affect the signal state.
2-18
1
State During
Reset
Stop
Input
Disconnected
internally
Input
Disconnected
internally
Input
Disconnected
internally
DSP56303 User's Manual
Signal Description
Serial Clock—Provides the serial bit rate clock for the ESSI
interface for both the transmitter and receiver in Synchronous
modes, or the transmitter only in Asynchronous modes.
Although an external serial clock can be independent of and
asynchronous to the DSP system clock, it must exceed the
minimum clock cycle time of 6 T (that is, the system clock
frequency must be at least three times the external ESSI clock
frequency). The ESSI needs at least three DSP phases inside
each half of the serial clock.
Port D 3—The default configuration following reset is GPIO.
For PD3, signal direction is controlled through PRRD.
This signal is configured as SCK1 or PD3 through PCRD.
This input is 5 V tolerant.
Serial Receive Data—Receives serial data and transfers the
data to the ESSI receive shift register. SRD0 is an input when
data is being received.
Port D 4—The default configuration following reset is GPIO.
For PD4, signal direction is controlled through PRRD.
This signal is configured as SRD1 or PD4 through PCRD.
This input is 5 V tolerant.
Serial Transmit Data—Transmits data from the serial transmit
shift register. STD1 is an output when data is being
transmitted.
Port C 5—The default configuration following reset is GPIO.
For PD5, signal direction is controlled through PRRD.
This signal is configured as STD1 or PD5 through PCRD.
This input is 5 V tolerant.

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