Motorola DSP56303 User Manual page 262

24-bit digital signal processor
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Direct Memory Access (DMA) Equates
M_DCR3
EQU
$FFFFE0
;
Register Addresses Of DMA4
M_DSR4
EQU
$FFFFDF
M_DDR4
EQU
$FFFFDE
M_DCO4
EQU
$FFFFDD
M_DCR4
EQU
$FFFFDC
;
Register Addresses Of DMA5
M_DSR5
EQU
$FFFFDB
M_DDR5
EQU
$FFFFDA
M_DCO5
EQU
$FFFFD9
M_DCR5
EQU
$FFFFD8
;
DMA Control Register
M_DSS
EQU
M_DSS0
EQU
M_DSS1
EQU
M_DDS
EQU
M_DDS0
EQU
M_DDS1
EQU
M_DAM
EQU
M_DAM0
EQU
M_DAM1
EQU
M_DAM2
EQU
M_DAM3
EQU
M_DAM4
EQU
M_DAM5
EQU
M_D3D
EQU
M_DRS
EQU
M_DCON
EQU
M_DPR
EQU
M_DPR0
EQU
M_DPR1
EQU
M_DTM
EQU
M_DTM0
EQU
M_DTM1
EQU
M_DTM2
EQU
M_DIE
EQU
M_DE
EQU
;
DMA Status Register
M_DTD
EQU
M_DTD0
EQU
M_DTD1
EQU
M_DTD2
EQU
M_DTD3
EQU
A-16
; DMA3 Control Register
; DMA4 Source Address Register
; DMA4 Destination Address Register
; DMA4 Counter
; DMA4 Control Register
; DMA5 Source Address Register
; DMA5 Destination Address Register
; DMA5 Counter
; DMA5 Control Register
$3
0
1
$C
2
3
$3f0
4
5
6
7
8
9
10
$F800
16
$60000
17
18
$380000
19
20
21
22
23
$3F
0
; DMA Channel Transfer Done Status 0
1
; DMA Channel Transfer Done Status 1
2
; DMA Channel Transfer Done Status 2
3
; DMA Channel Transfer Done Status 3
DSP56303 User's Manual
; DMA Source Space Mask
; (DSS0-Dss1)
; DMA Source Memory space 0
; DMA Source Memory space 1
; DMA Destination Space Mask
; (DDS-DDS1)
; DMA Destination Memory Space 0
; DMA Destination Memory Space 1
; DMA Address Mode Mask
;(DAM5-DAM0)
; DMA Address Mode 0
; DMA Address Mode 1
; DMA Address Mode 2
; DMA Address Mode 3
; DMA Address Mode 4
; DMA Address Mode 5
; DMA Three Dimensional Mode
; DMA Request Source Mask (DRS0-DRS4)
; DMA Continuous Mode
; DMA Channel Priority
; DMA Channel Priority Level (low)
; DMA Channel Priority Level (high)
; DMA Transfer Mode Mask
;(DTM2-DTM0)
; DMA Transfer Mode 0
; DMA Transfer Mode 1
; DMA Transfer Mode 2
; DMA Interrupt Enable bit
; DMA Channel Enable bit
;Channel Transfer Done Status MASK

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