Jtag Identification (Id) Register; Jtag Boundary Scan Register (Bsr); Jtag Identification Register Configuration (Revision E) - Motorola DSP56303 User Manual

24-bit digital signal processor
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JTAG Identification (ID) Register

4.9
JTAG Identification (ID) Register
The JTAG ID register is a 32-bit read-only factory-programmed register that distinguishes the
component on a board according to the IEEE 1149.1 standard. Figure 4-11 shows the JTAG
ID register configuration. Version information corresponds to the revision number ($0 for
revision 0, $1 for revision A, and so forth).
I)
31
Version Information
0101
Figure 4-11. JTAG Identification Register Configuration (Revision E)
4.10

JTAG Boundary Scan Register (BSR)

The BSR in the DSP56303 JTAG implementation contains bits for all device signals, clock
pins, and their associated control signals. All DSP56303 bidirectional pins have a
corresponding register bit in the BSR for pin data and are controlled by an associated control
bit in the BSR. For details on the BSR, consult the DSP56300 Family Manual. For the latest
description of the BSR contents by available package type in boundary scan description
language (BSDL), call your local Motorola Semiconductor Sales Office or authorized
distributor, or refer to the following Motorola website:
http://www.mot.com/SPS/DSP/tools/other.html#56303
4-38
28
27
22
Design Center
Number
000110
DSP56303 User's Manual
21
12
11
Sequence
Number
0000000011
1
0
Manufacturer
1
Identity
00000001110
1

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