Iec 61850 Edition 1, Edition 2, And Edition 2.1 Mapping - Hitachi Relion 670 Series Applications Manual

1MRK506375-UEN Rev. N
•
•
• Dimensions are provided both in inches and millimeters. If it is not specifically mentioned then
the dimension is in millimeters.
1.5

IEC 61850 Edition 1, Edition 2, and Edition 2.1 mapping

Function block names are used in ACT and PST to identify functions. Respective function block
names of Edition 1, Edition 2, and Edition 2.1 logical nodes are shown in the table below.
Table 1:
Function block name
-
-
AGSAL
ALMCALH
ALTIM
ALTMS
ALTRK
BRPTOC
BTIGAPC
CCRWRBRF
CCSSPVC
CHMMHAN
CMMXU
CMSQI
CVMMXN
D2PTOC
DELISPVC
DELSPVC
DELVSPVC
DPGAPC
DRPRDRE
ECPSCH
ECRWPSCH
EF2PTOC
EFRWPIOC
ETPMMTR
FLTMMXU
Table continues on next page
Railway application RER670
Application manual
the character ^ in front of an input/output signal name indicates that the signal name may
be customized using the PCM600 software.
the character * after an input signal name indicates that the signal must be connected to
another function block in the application configuration to achieve a valid application
configuration.
IEC 61850 Edition 1, Edition 2, and Edition 2.1 mapping
Edition 1 logical nodes
-
-
AGSAL
SECLLN0
ALMCALH
-
-
-
BRPTOC
B16IFCVI
CCRWRBRF
CCSRDIF
-
CMMXU
CMSQI
CVMMXN
D2LLN0
D2PTOC
PH1PTRC
DELISPVC
DELSPVC
DELVSPVC
DPGGIO
DRPRDRE
ECPSCH
ECRWPSCH
EF2LLN0
EF2PTRC
EF2RDIR
GEN2PHAR
PH1PTOC
EFRWPIOC
ETPMMTR
FLTMMXU
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Introduction
GUID-C5133366-7260-4C47-A975-7DBAB3A33A96 v10
Edition 2 and Edition 2.1 logical
nodes
ALGOS
ALSVS
AGSAL
ALMCALH
ALTIM
ALTMS
ALTRK
BRPTOC
BTIGAPC
CCRWRBRF
CCSSPVC
LLN0
CHMMHAN
CHMQVHA
CMMXU
CMSQI
CVMMXN
D2PTOC
PH1PTRC
DELISPVC
DELSPVC
DELVSPVC
DPGAPC
DRPRDRE
ECPSCH
ECRWPSCH
EF2PTRC
EF2RDIR
GEN2PHAR
PH1PTOC
EFRWPIOC
ETPMMTR
FLTMMXU
Section 1
21