User Sma Global Clock Inputs; User Leds (Active High); User Dip Switches (Active High) - Xilinx SP623 User Manual

User SMA Global Clock Inputs

[Figure
The SP623 board provides two single-ended clock input SMAs that can be used for
connecting to an external function generator. These clock inputs can alternatively be used
as a differential pair. The FPGA clock pins are connected to the SMAs as shown in
Table
Note:
used.
Table 1-7: SMA Clock Input Connections

User LEDs (Active High)

[Figure
DS10 through DS17 are eight active-High LEDs that are connected to user I/O on the
FPGA as shown in
purpose determined by the user.
Table 1-8: User LEDs

User DIP Switches (Active High)

[Figure
DIP switch SW7 provides a set of eight active-High switches that connect to user I/O on
the FPGA, as shown in
functions determined by the user.
SP623 Board User Guide
UG751 (v1.0) May 22, 2010
1-2, callout 12]
1-7.
Jumpers should NOT be installed on AFX SEL headers J99 and J100 if these clock inputs are
FPGA Pin Net Name
R25 SMA_CLK_P
R26 SMA_CLK_N
1-2, callout 13]
Table 1-8. These LEDs can be used to indicate status, or any other
FPGA Pin Net Name
L21 LED1
L20 LED2
M23 LED3
M21 LED4
N26 LED5
N25 LED6
L26 LED7
L25 LED8
1-2, callout 14]
Table 1-9. These pins can be used to set control pins, or other
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Detailed Description
SMA Connector
J167
J168
Reference
Designator
DS17
DS16
DS15
DS14
DS13
DS12
DS11
DS10
19