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Chapter 1: SP623 Board Features and Operation
System ACE Controller
[Figure
The onboard System ACE controller (U25) allows storage of multiple configuration files on
a CompactFlash card. These configuration files can be used to program the FPGA. The
CompactFlash card connects to the CompactFlash card connector (U24) located directly
below the System ACE controller on the back-side of the board.
System ACE Controller Reset
[Figure
Pressing push button SW2 (RESET) resets the System ACE controller. Reset is an
active-Low input.
Configuration Address DIP Switches
[Figure
DIP switch SW3 selects one of the eight configuration bitstream addresses in the
CompactFlash memory card. The switch settings for selecting each address are identified
in
Table 1-3: SW3 DIP Switch Configuration
Notes:
1. O indicates the open switch position (logic 0).
2. C indicates the closed switch position (logic 1).
JTAG Isolation Jumpers
[Figure
The group of four 2-pin headers shown in
FPGA JTAG interface from the System ACE controller by removing the shunts from all
four headers. The FPGA JTAG interface can also be driven directly from these headers by
attaching the flying wire JTAG cable to pin 2 of each header.
detailed representation of the isolation jumpers as part of the broader JTAG chain in
Figure
16
1-2, callout 6]
1-2, callout 7]
1-2, callout 8]
Table
1-3.
Address
ADR2
ADR1
(1)
0
O
1
O
2
O
3
O
4
C
5
C
6
C
7
C
1-2, callout 9]
1-6.
www.xilinx.com
ADR0
O
O
(2)
O
C
C
O
C
C
O
O
O
C
C
O
C
C
Figure 1-7
provide the option to isolate the
Figure 1-7
shows a more
SP623 Board User Guide
UG751 (v1.0) May 22, 2010
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