Initialization and calibration of ProSLIC devices (U13 and U18)
•
Monitoring and control of ProSLIC and FPGA registers
•
Communication of the unit status and alarm information to the JIF-Share
•
unit for the Network Management System (NMS)
Processing the configuration requests from CI and/or NMS.
•
The 32.768 kHz crystal Y1 forms an oscillator with the micro, which multiplies it
for an internal 16.78 MHz CPU clock.
The Flash memory (U7) contains the operating code for the micro, configuration
code for the FPGA, and user settings for the unit.
Copyright GE Multilin Inc. 2002
342-86400-445PS
Issue 4.0
October 2006
Page 57