Transmit Signaling; Receive Signaling - GE JungleMUX 86445-31 Technical Practice And Installation Manual

The output VF signal is sent to the Paddleboard via bantam jack J5 and back
connector J1(A4,A3) where it is terminated.

Transmit Signaling

The SLIC presents -4V at U14(39) and battery voltage -4V at U14(41).
Loop current is sensed at resistors R29 and R27 by SLIC Transversal Amplifier
and indicated at the output U14(11) that is connected to U5(81). The maximum
DC loop current is limited by resistors R31-R34 to 20, 30, 40, or 50 mA.
Ring ground is sensed by SLIC Longitudinal Amplifier and indicated at output
U14(12). A and B signaling bits are generated in the PLGA with bit position
defined by channel number.
The signaling data is "or-ed" with VF data and presented to the data output
U5(59). The signal is sent to the JVT shelf driver U7 and then out to the back
connector J1(A14,C14).
The Transmit Signaling condition can be read through a signaling monitor
window provided in the JCI software.

Receive Signaling

The PLGA Receive Signaling Module outputs the receive message on U5 (83,84)
to the SLIC U14(8,9). The Ring Relay Driver in the SLIC (36) controls closure of
the solid-state relay U12. Ring side (negative side) injected ringing method is
used so ringing voltage at Ring is superimposed on the negative battery voltage
and Tip is connected to battery ground.
The PLGA Receive Signaling Module also controls relays U13 and U16 through
U5(46,76). These relays are opened during ringing, which disconnects SLIC Tip
feed, and Ring feed. At the same time, U5(46) is controlling Q1, which connects
the ringing generator +5V supply only when ringing is requested.
The SLIC Ring Trip Detector senses the loop current at resistor R29 and
activates SHD U14(11), which is read by U5(81).
Solid-state relay U13 is open in the idle condition for FXS ground start signaling.
If the Tip-to-Ground message is received from the far end, U13 closes.
Copyright  GE Multilin Inc. 2002
342-86400-445PS
Issue 4.0
October 2006
Page 19