Atm Interface Processor (Aip) - Cisco 7000 Series Hardware Installation And Maintenance Manual

Physical Description
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Caution
Cisco 7010 (the SX-SIP requires SxBus connectors that are not present in the Cisco 7010). In
October 1993, the FSIP replaced the SIP in the product line, and most SIPs in the field have now
been replaced with FSIPs. We recommend that you replace any SIPs that you still have as spares, as
soon as possible; the upgrade is free of charge. Contact a customer service representative for upgrade
information.
The microcode on the SP (and SSP) and on each interface processor contains board-specific software
instructions. New features and enhancements to the system or interfaces are often implemented in
microcode upgrades. The Cisco 7000 series routers support downloadable microcode for most
maintenance upgrades, which enables you to download new microcode images remotely and store
them in Flash memory. You can then use software commands to instruct the system to load a specific
microcode image from Flash or to load the default microcode image from ROM.
System software upgrades also can contain upgraded microcode images, which will load
automatically when the new software image is loaded. Although most upgrades support the
downloadable microcode feature and are distributed on floppy disk, some may require ROM
replacement. If replacement is necessary, refer to the section "Microcode Component Replacement"
in the chapter "Maintenance." Also, specific instructions are provided with the replacement
component in an upgrade kit.
Each interface processor has a unique bank of status LEDs, and all have a common enabled LED at
the left end of the interface processor face plate. The enabled LED goes on when the RP has
completed initialization of the interface processor for operation, indicating that, as a minimum, the
interface processor is correctly connected to the backplane, that it is receiving power, and that it
contains a valid microcode version. If any of these conditions is not met, or if the initialization fails
for other reasons, the enabled LED stays off. Additional LEDs on each interface processor type
indicate the state of the interfaces.
The following sections describe each interface processor type. The appendix "Reading LED
Indicators" describes the specific LED states of each.

ATM Interface Processor (AIP)

The AIP provides a direct connection between the high-speed CxBus and the external networks. (See
Figure 1-13.) The physical layer interface module (PLIM) on the AIP determines the type of ATM
connection.
Figure 1-13
1-22 Cisco 7010 Hardware Installation and Maintenance
MIP—MultiChannel Interface Processor with up to two channelized T1 interfaces that operate
at T1 speed: up to 1.544 Mbps.
The early serial interface processor (SX-SIP or PRE-FSIP) cannot be used in the
AIP with 100 Mbps UNI PLIM