Fujitsu FR60 Hardware Manual page 604

APPENDIX
Table A-1 I/O Map (4 / 10)
Address
+0
000120
H
000124
H
XXXXXXXXXXXXXXXX
000128
H
*3
00012C
H
XXXXXXXXXXXXXXXX
000130
H
000134
H
XXXXXXXXXXXXXXXX
000138
H
00013C
H
XXXXXXXXXXXXXXXX
000140
H
000144
H
XXXXXXXXXXXXXXXX
000148
H
00014C
H
XXXXXXXXXXXXXXXX
000150
H
to
0001FC
H
000200
H
000204
H
000208
H
00020C
H
000210
H
000214
H
*3: The MB91F353A/351A/352A/353A do not have this register. Access is not allowed.
*4: The 16 low-order bits (DTC[15:0]) of DMACA0 to 4 can not be byte-accessed.
586
+1
PTMR0[R]H,W
1111111111111111
PDUT0[W]H,W
PTMR1[R]H,W
1111111111111111
*3
PDUT1[W]H,W
PTMR2[R]H,W
1111111111111111
PDUT2[W]H,W
*3
PTMR3[R]H,W
1111111111111111
*3
PDUT3[W]H,W
PTMR4[R]H,W
1111111111111111
PDUT4[W]H,W
*3
PTMR5[R]H,W
1111111111111111
*3
PDUT5[W]H,W
DMACA0[R/W]B,H,W
000000000000XXXXXXXXXXXXXXXXXXXX
DMACB0[R/W]B,H,W
0000000000000000XXXXXXXXXXXXXXXX
DMACA1[R/W]B,H,W
000000000000XXXXXXXXXXXXXXXXXXXX
DMACB1[R/W]B,H,W
0000000000000000XXXXXXXXXXXXXXXX
DMACA2[R/W]B,H,W
000000000000XXXXXXXXXXXXXXXXXXXX
DMACB2[R/W]B,H,W
0000000000000000XXXXXXXXXXXXXXXX
Register
+2
PCSR0[W]H,W
XXXXXXXXXXXXXXXX
PCNH0[R/W]B,H,W
00000000
PCSR1[W]H,W
*3
XXXXXXXXXXXXXXXX
*3
PCNH1[R/W]B,H,W
00000000
PCSR2[W]H,W
XXXXXXXXXXXXXXXX
PCNH2[R/W]B,H,W
00000000
PCSR3[W]H,W
XXXXXXXXXXXXXXXX
*3
PCNH3[R/W]B,H,W
00000000
PCSR4[W]H,W
XXXXXXXXXXXXXXXX
PCNH4[R/W]B,H,W
00000000
PCSR5[W]H,W
XXXXXXXXXXXXXXXX
*3
PCNH5[R/W]B,H,W
00000000
________
*4
*4
*4
+3
PPG0
PCNL0[R/W]
000000X0
PPG1
*3
PCNL1[R/W]B,H,W
00000000
PPG2
PCNL2[R/W]B,H,W
00000000
*3
PPG3
*3
PCNL3[R/W]B,H,W
00000000
PPG4
PCNL4[R/W]B,H,W
00000000
*3
PPG5
*3
PCNL5[R/W]B,H,W
00000000
Reserved
DMAC
Block
*3
*3
*3