Mode Settings - Fujitsu FR60 Hardware Manual

CHAPTER 3 CPU AND CONTROL UNITS
3.8.2

Mode Settings

In the FR family microcontrollers, the mode pins (MD2, MD1, and MD0) and the mode
register (MODR) are used to set the operating mode.
■ Mode Pins
Use the three mode pins (MD2, MD1, and MD0) to specify mode vector fetch.
Table 3.8-1 lists the specifications related to mode vector fetch.
Table 3.8-1 Specifications Related to Mode Vector Fetch
MD2
0
0
Settings not listed in the table above are not allowed.
■ Mode Register (MODR)
Mode data is data written to the mode register by a mode vector fetch. For the mode vector fetch, see
(Section "3.9.3 Reset Sequence").
After the data is set to the mode register (MODR), it operates in the operating mode according to this
register setting.
Mode data is always set in the mode register when any reset source arises. A user program cannot write
data to the mode register.
Reference:
Nothing exists at the address (0000_07FF
microcontrollers.
Data can be rewritten to the mode register in emulator mode. Use an 8-bit long data transfer instruction to
rewrite data.
A 16-bit or 32-bit long data transfer instruction cannot be used to rewrite data to the mode register.
Details of the mode register are given below:
92
Mode pin
MD1 MD0
Internal ROM mode
0 0
vector
External ROM mode
0 1
vector
Reset vector
Mode name
access area
Internal
External
) of the mode register in conventional FR family
H
Remarks
-
Set the bus width using the
mode register.