Fujitsu FR60 Hardware Manual page 268

CHAPTER 6 8/16-bit Up/Down Counters/Timer and U-Timers
■ Block Diagram of the 8/16-bit Up/Down Counters/Timers (ch0)
Figure 6.1-1 shows a block diagram of the 8/16-bit up/down counters/timers (for Channel 0).
Figure 6.1-1 Block Diagram of the 8/16-bit Up/Down Counters/Timers (ch0)
ZIN0
AIN0
BIN0
250
Data bus
CGE0 CGSC
CGE1
Detects edge
or level
UDCC
CES0
CES1
CMS1 CMS0
Count
Select up
clock
CSTR
or down
count
clock
UDF1
Prescaler
CLKS
8 bits
RCR0 (Reload/
compare register 0)
Control
CTUT
reload
UCRE RLDE
Clear
counter
8 bits
UDCR0
(Up/down count register 0)
UDFF
CDCF
UDF0
Output interrupt
To channel 1
M16E
Carry
CMPF
OVFF
UDIE
CITE
CFIE