HP 16600A Series User Manual page 221

Chapter 10: Hardware Reference
Analysis probe—operating characteristics
Theory of operation and clocking
Timing
For timing measurements, raw digital signals from the microcontroller
are presented to the logic analyzer through the timing connectors. The
acquisition clock is provided by the logic analyzer.
State
For state measurements, all signals are processed by active logic for
time alignment before they are routed to the state connectors. This
allows the logic analyzer to capture all information about a given cycle
in one acquisition state.
Some of the signals which assist the analysis probe in triggering and
aligning the source code are reconstructed from their reconfigured
functions as chip selects or general I/O. The analysis probe must be
configured to match the target system for this reconstruction function
to work (page 81).
A qualified target system clock is used by the logic analyzer to acquire
state cycles.
Address reconstruction overview
When CPU32 microcontrollers are reconfigured, they can present
special problems for debugging. This is especially true when address
bits A[19:23] are reconfigured as chip selects. The HP E2480A analysis
probe overcomes these problems by using information in the base
address register associated with such chip selects to replace the
missing address bits. The value injected into the signal path depends
on which chip select is active.
This reconstruction provides many benefits when analyzing a target
system:
220 Solutions for CPU32