HP 16600A Series User Manual page 210

Chapter 9: Using the Analysis Probe and Emulation Module Together
clock to stop. Therefore most intermodule measurements will have to
be stopped to see the measurement.
Example
An intermodule measurement has been set up where the analyzer
is triggering the emulation module. The following sequence could
occur:
1. The analyzer triggers.
2. The trigger ("Break In") is sent to the emulation module.
3. The emulation module stops the user program which is running on
the target processor. The processor enters a background debug
monitor.
4. Because the processor has stopped, the analyzer stops receiving a
qualified clock signal.
5. If the trigger position is "End", the measurement will be completed.
If the trigger position is not "End", the analyzer may continue waiting
for more states.
6. The user clicks Stop in a logic analyzer window, which tells the logic
analyzer to stop waiting, and to display the trace.
Solutions for CPU32
Triggering the Emulation Module from the Analyzer
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