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Sony BKP-5090 Installation And Maintenance Manual page 106

Camera upgrade board

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IC
RTC-4553B (EPSON)
C-MOS REAL TIME CLOCK
—TOP VIEW—
TP
1
14
GND
WR
2
13
S
IN
OUT
S
3
12
CS1
IN
SCK
CS0
4
11
IN
L1
5
10
L5
IN
IN
L2
6
9
L4
IN
IN
L3
7
V
8
IN
DD
INPUT
CS0
: CHIP SELECT (L : ACCESS ENABLE, H : SOUT HIGH Z)
CS1
: POWER DOWN DETECTION
L1 - L5
: TEST IN
SCK
: SERIAL SYNC SIGNAL
SIN
: SERIAL ADDRESS/DATA
WR
: WRITING SELECT (L : WRITING, H : READING)
OUTPUT
SOUT
: SERIAL ADDRESS/DATA
TPOUT
: REFERENCE SIGNAL
OSC
DIVIDING
4
SCK
CONTROL
3
SIN
12
CS1
CONTROL
11
CS0
SHIFT
REGISTER
2
WR
5 - 7, 9, 10
TEST
OUTPUT
L1 - L3
CONTROL
L4, L5
TC74HC595AF(EL) (TOSHIBA)FLAT PACAGE
C-MOS 8-BIT SERIAL-INPUT/SERIAL- OR PARALLEL-OUTPUT
SHIFT REGISTER WITH LATCHED 3-STATE OUTPUT
—TOP VIEW—
QB
OUT
1
V
16
DD
QC
2
15
QA
OUT
QD
3
14
SI
OUT
QE
OUT
4
13
OE
QF
5
12
LCK (
OUT
QG
6
11
SCK (
OUT
QH
OUT
7
10
RESET
8
GND
9
SQH
10
RESET
R
D
14
SI
D
Q
11
SCK
12
LCK
13
OE
6-14
OUT
4
SCK
3
13
SIN
S OUT
11
CS0
12
CS1
IN
2
WR
14
TP OUT
IN
5
L1
6
L2
7
L3
9
L4
10
L5
OUTPUT CONTROL
SECOND
MINUTE HOUR DAY DATE MONTH YEAR
CONTROL
CONTROL
CONTROL
RAM
REGISTER
REGISTER
REGISTER
(120-BIT)
(1)
(2)
(3)
14
15
QA
SI
1
QB
10
2
RESET
QC
OUT
3
QD
4
QE
IN
5
QF
6
QG
IN
7
QH
11
SCK
)
IN
12
LCK
)
IN
9
SQH
OE
IN
13
OUT
OE
: OUTPUT ENABLE INPUT
LCK
: LATCH CLOCK INPUT
SCK
: SHIFT CLOCK INPUT
RESET
: SHIFT-REGISTER RESET INPUT
SI
: SERIAL N
QA - QH
: PARALLEL OUTPUT
SQH
: SERIAL OUT
R
R
D
D
9
D
Q
D
Q
D
Q
D
Q
15
7
QA
QH
STK10C68-S35 (SIMTEK)FLAT PACKAGE
C-MOS 8 K x 8-BIT NONVOLATILE SRAM
—TOP VIEW—
NE
1
IN
A12
2
IN
A7
3
IN
A6
4
IN
A5
5
IN
A4
6
IN
A3
7
IN
A2
8
IN
A1
9
IN
A0
10
IN
D0
11
IN/OUT
D1
12
IN/OUT
D2
13
IN/OUT
14
GND
14
TP OUT
7
A3
6
A4
5
A5
4
A6
ROW
3
DECODER
A7
25
A8
24
A9
2
13
A12
S OUT
10
A0
9
A1
COLUMN
8
A2
DECODER
21
A10
23
A11
22
OE
27
WE
1
NE
20
CE
STORE/RECALL
CONTROL
TC74VHC157FT(EL) (TOSHIBA)FLAT PACKAGE
C-MOS QUAD 2-LINE-TO-1-LINE DATA SELECTOR/MULTIPLEXER
—TOP VIEW—
INH
Y0
Y1
YC
IN
IN
IN
OUT
16
15
14
13
12
V
DD
1
0
0
1
SQH
1
2
3
4
5
A
V0
V1
VC
W0
IN
IN
IN
OUT
IN
CONT. IN
ON
INH
A
CHANNEL
0
0
0
0
1
1
x
1
GND
10
11
A0
D0
V
28
9
12
DD
A1
D1
8
13
A2
D2
WE
27
IN
7
15
A3
D3
6
16
A4
D4
NC
26
5
17
A5
D5
4
18
A6
D6
25
A8
3
19
IN
A7
D7
25
A8
24
A9
IN
24
A9
21
A10
23
A11
IN
23
A11
2
A12
OE
22
IN
NE
CE
OE
WE
21
A10
IN
1
20
22
27
CE
20
IN
INPUT
19
D7
IN/OUT
A0 - A12
: ADDRESS
CE
: CHIP ENABLE
18
D6
NE
IN/OUT
: NONVOLATILE ENABLE
OE
: OUTPUT ENABLE
17
D5
IN/OUT
WE
: WRITE ENABLE
16
D4
IN/OUT
INPUT/OUTPUT
D0 - D7
: DATA
15
D3
IN/OUT
STORE
EEPROM ARRAY
RECALL
256 x 256
STATIC RAM
ARRAY
256 x256
COLUMN
11
I/O
12
13
15
8
8
8
16
17
18
8
8
INPUT
19
BUFFER
X0
X1
XC
2
V0
IN
IN
OUT
3
V1
VC
11
10
9
1
5
W0
W1
WC
0
6
0
1
11
X0
10
X1
XC
GND
6
7
8
W1
WC
14
Y0
IN
OUT
13
Y1
YC
A
INH
1
15
0
: LOW LEVEL
1
: HIGH LEVEL
x
: DON'T CARE
D0
D1
D2
D3
D4
D5
D6
D7
4
7
9
12
BKP-5090

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