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MB88351PFV (FUJITSU)FLAT PACKAGE
MB88351PFV-ER
C-MOS 12-BIT D/A CONVERTER WITH OPERATIONAL AMPLIFIER
—TOP VIEW—
1
GND
GND
20
17
2
NC
NC
19
16
3
NC
NC
18
15
AO1
4
17
DI
OUT
IN
AO2
5
16
CLK
OUT
IN
AO3
6
15
LD
OUT
IN
AO4
7
14
DO
OUT
OUT
8
NC
NC
13
9
NC
NC
12
10
V
V
11
DD
DD
INPUT
CLK
: CHIFT CLOCK
DI
: SERIAL DATA
LD
: DECODER AND D/A REGISTER TO LOAD
OUTPUT
AO1 - AO4
: ANALOG DATA
DO
: MBS BIT DATA IN 15-BIT SHIFT REGISTER
D12
D13
D14
ADDRESS SELECT
0
0
0
DON'T CARE
0
0
1
AO1 SELECT
0
1
0
AO2 SELECT
0
1
1
AO3 SELECT
1
0
0
AO4 SELECT
1
0
1
DON'T CARE
1
1
0
DON'T CARE
1
1
1
DON'T CARE
1CH
12
12
D12
12-BIT
|
LATCH
D14
17
4CH
DI
15-BIT
12
16
SHIFT
12-BIT
CLK
REGISTER
LATCH
1
3
D12
2
ADDRESS
|
3
DECODER
4
D14
15
LD
TC4W53FU (TOSHIBA)CHIP PACKAGE
TC4W53FU(TE12R)
C-MOS 2-CHANNEL MULTIPLEXER/DEMULTIPLEXER
—TOP VIEW—
1
8 V
6
ch1
DD
7
ch0
C
1
7
2
OPEN
3
6
5
A
GND 4
5
INH
V
EE
2
3
CONT. INPUT
ON
CHANNEL
INH
A
0
0
ch0
0
: LOW LEVEL
0
1
ch1
1
: HIGH LEVEL
1
x
OPEN
x
: DON'T CARE
BKP-5090
4
AO1
5
DI
AO2
6
AO3
7
AO4
14
LD
DO
0
: LOW LEVEL
1
: HIGH LEVEL
12-BIT R-2R
4
AMP
AO1
D/A
CONVERTER
5
AO2
6
AO3
12-BIT R-2R
7
AO4
AMP
D/A
CONVERTER
14
DO
MSM82C55A-2GS
MSM82C55A-2GS-VK (OKI)FLAT PACKAGE
C-MOS PROGRAMMABLE PERIPHERAL INTERFACE
—TOP VIEW—
44 43 42 41 40 39 38 37 36 35 34
CS
1
2
GND
A1
3
A0
4
PC7
5
PC6
6
PC5
7
PC4
8
PC0
9
PC1
10
PC2
11
12 13 14 15 16 17 18 19 20 21 22
CS
WR
RD
A1
A0
OPERATION
PORT A → DATA BUS
0
0
0
1
0
PORT B → DATA BUS
0
1
0
1
0
PORT C → DATA BUS
1
0
0
1
0
1
1
0
1
0
NO OPERATION
DATA BUS → PORT A
0
0
0
0
1
DATA BUS → PORT B
0
1
0
0
1
DATA BUS → PORT C
1
0
0
0
1
DATA BUS → CONTROL REGISTER
1
1
0
0
1
X
X
1
X
X
HIGH IMPEDANCE
0
: LOW LEVEL
A0, A1
: PORT SELECT ADDRESS
CS
: CHIP SELECT
1
: HIGH LEVEL
X
D0 - 7
: DATA BUS
: DON'T CARE
PA0 - 7
: PORT A IN/OUT
PB0 - 7
: PORT B IN/OUT
PC0 - 7
: PORT C IN/OUT
RD
: READ
WR
: WRITE
GROUP
A
CONTROL
DATA
BUS
D0 - D7
BUFFER
RD
WR
RESET
GROUP
READ/
CS
B
WRITE
CONTROL
A0
CONTROL
A1
LOGIC
TC7S00FU(TE85R) (TOSHIBA)CHIP PACKAGE
C-MOS 2-INPUT NAND GATE
—TOP VIEW—
2
1
5 V
DD
A
A
4
Y
=
1
B
B
2
A
B
GND 3
4
Y = A • B =
+
A
B
Y
0
0
1
0
1
1
1
0
1
0
: LOW LEVEL
1
1
0
1
: HIGH LEVEL
32
43
D0
PA0
31
42
D1
PA1
30
41
D2
PA2
29
40
33
RESET
D3
PA3
28
38
D4
PA4
32
D0
27
37
D5
PA5
26
36
31
D1
D6
PA6
25
35
D7
PA7
30
D2
14
29
D3
PB0
15
PB1
28
D4
4
16
A0
PB2
3
18
27
D5
A1
PB3
19
PB4
26
D6
20
PB5
21
25
D7
PB6
23
PB7
V
DD
24
9
23
PB7
PC0
10
PC1
11
PC2
44
13
RD
PC3
34
8
WR
PC4
7
PC5
6
PC6
1
5
CS
PC7
RESET
33
GROUP
A
PA0 - PA7
PORT A
GROUP
A
PC4 - PC7
PORT C
HIGHER
4-BITS
GROUP
B
PC0 - PC3
PORT C
LOWER
4-BITS
GROUP
B
PB0 - PB7
PORT B
Y
6-13
IC
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