Nokia 9000i Service Manual page 61

After Sales
Technical Documentation
Physically the D2CA ASIC is located in MCM2. The VCXO clock buffer
and SIM power switch are assembled on CMT motherboard.
Technical specification
Table 36. External Signals and Connections, Inputs
Signal Name
VL1 Logic supply voltage. Max 150 mA.
IOX I/O enable. Indicates access to DSP I/O address space.
RWX Read/WriteX
WSTROBEX MCU's write strobe
RSTROBEX MCU's read strobe
RFC Reference clock from VCXO (26 MHz)
XRES Master reset
DSPAD(16:0) DSP's address bus and control signals
MCUAD(19:16,4:0 MCU's address bus
)
DAX Data acknowledge
MRBUSDET MBUS/RBUS activity detection
DBUSDET DBUS activity detection
Table 37. External Signals and Connections, Outputs
Signal Name
INT0, INT1 Interrupts for DSP
NMI Not maskable interrupt request
IRQX Interrupt request
RESETX Master (power up) reset
DSP1RSTX Reset for the DSP
SIMRESET Reset for the SIM
WRX Write strobe
RDX Read strobe
RFIAD(3:0) RFI address bus
SCLK Synthesizer load clock
SDATA Synthesizer load data
SENA1 UHF and VHF PLL enable
RXPWR RX circuitry power enable
TXPWR TX circuitry power enable
SYNTHPWR Synthesizer circuitry power enable
TXP Transmitter power control enable
MCUCLK Main clock for MCU (26 MHz)
Original, 08/96
Signal description
Signal description
RAE/RAK–1N
Baseband
From
PWRU
DSPU
DSPU
CTRLU
CTRLU
RF
PWRU
DSPU
CTRLU
RFI
CTRLU
DSPU
To
DSPU
CTRLU
CTRLU
CTRLU,
RFI
DSPU
SIMFLEX
conn
RFI
RFI
RFI
RF
RF
RF
RF
RF
RF
RF
CTRLU
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