Mitsubishi Electric MELSEC iQ-R Series User Manual page 288

Serial communication module
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■Combination with the start frame (Timing patterns for data reception start and data reception
complete (read))
(For data reception with format-0)
Pattern No. 1-A 1)
Target device
CPU module
Pattern No. 1-B
Target device
CPU module
Pattern No. 1-C 1)
Target device
CPU module
(For data reception with format-1)
Pattern No. 1-D
Target device
CPU module
Pattern No. 1-E
Target device
CPU module
When data is received using Method 1, C24 checks again whether the start frame has been received after
receiving data equaling the 'method 1 dedicated receive end data quantity'. Reception data during that time is
ignored.
15 DATA COMMUNICATIONS USING USER FRAMES
286
15.2 Data Reception
Arbitrary data
Arbitrary data
For the received
data count
Arbitrary data
For received data count
for format 1 only
Receive data
When received data count
for format 1 only is 0
Ignored
Pattern No. 1-A 2)
Equaling the
received data
count
Pattern No. 1-C 2)
For the received
data count
Receive data
For received data count
for format 1 only
Ignored
Arbitrary data
For the
received data
count
Arbitrary data
For the received
data count
Arbitrary data
: Reception start timing
: Receive complete timing (read timing)

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