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Samsung S3C8248 User Manual page 88

8-bit cmos

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S3C8248/C8245/P8245/C8247/C8249/P8249
VLDCON
— Voltage Level Detector Control Register
Bit Identifier
RESET Value
RESET
Read/Write
Addressing Mode
.7–.5
.4
.3
.2
.1–.0
.7
.6
0
0
Register addressing mode only
Not used for the S3C8248/C8245/C8247/C8249
V
Source Bit
IN
0
Internal source
1
External source
VLD Output Bit
V
> V
(when VLD is enabled)
0
IN
REF
V
< V
(when VLD is enabled)
1
IN
REF
VLD Enable/disable Bit
0
Disable the VLD
1
Enable the VLD
Detection Level Bits
V
= 2.2 V
0
0
VLD
V
= 2.4 V
0
1
VLD
V
= 3.0 V
1
0
VLD
V
= 4.0 V
1
1
VLD
.5
.4
.3
0
0
0
R/W
R/W
CONTROL REGISTER
F6H
Set 1, Bank 1
.2
.1
0
0
R/W
R/W
R/W
.0
0
4-43

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C8245P8245C8249C8247P8249