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Samsung S3C8248 User Manual page 283

8-bit cmos

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ELECTRICAL DATA
V
DD
Interrupt
NOTE:
t
WAIT
Figure 19-4. Stop Mode (Main) Release Timing Initiated by Interrupts
V
DD
Interrupt
Figure 19-5. Stop Mode (Sub) Release Timing Initiated by Interrupts
19-8
Execution of
STOP Instruction
is the same as 16 x BT clock.
Execution of
STOP Instruction
NOTE:
When the case of select the fxx/128 for basic timer input
clock before enter the stop mode.
tWAIT = 128 x 16 x (1/32768) = 62.5 ms
Stop Mode
Data Retention Mode
V
DDDR
0.2 V
Stop Mode
Data Retention Mode
V
DDDR
0.2 V
S3C8248/C8245/P8245/C8247/C8249/P8249
Oscillation
Stabilization Time
Idle Mode
Normal
Operating Mode
DD
t
WAIT
Oscillation
Stabilization Time
Idle Mode
Normal
Operating Mode
DD
t
WAIT

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