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Samsung S3C8248 User Manual page 231

8-bit cmos

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8-BIT TIMER A/B
Timer B input clock selection bits:
00 = fxx
01 = fxx/2
10 = fxx/4
11 = fxx/8
Timer B interrupt time selection bits:
00 = Elapsed time for low data value
01 = Elapsed time for high data value
10 = Elapsed time for low and high data values
11 = Invalid setting
11-6
Timer B Control Register
ECH, Set 1, Bank 0, R/W
MSB
.7
.6
.5
Figure 11-4. Timer B Control Register (TBCON)
Timer B Data High-Byte Register
(TBDATAH) FAH, Set 1, Bank 0, R/W
MSB
.7
.6
.5
Timer B Data Low-Byte Register
(TBDATAL) EBH, Set 1, Bank 0, R/W
MSB
.7
.6
.5
Figure 11-5. Timer B Registers
S3C8248/C8245/P8245/C8247/C8249/P8249
.4
.3
.2
.1
Timer B mode selection bit:
0 = One-shot mode
1 = Repeating mode
Timer B start/stop bit:
0 = Stop timer B
1 = Start timer B
Timer B interrupt enable bit:
0 = Disable interrupt
1 = Enable interrupt
.4
.3
.2
.1
Reset Value: FFh
.4
.3
.2
.1
Reset Value: FFh
.0
LSB
Timer B output flip-flop control bit:
0 = TBOF is low
1 = TBOF is high
.0
LSB
.0
LSB

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