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A/D CONVERTER
CONVERSION TIMING
The A/D conversion process requires 4 steps (4 clock edges) to convert each bit and 10 clocks to set-up A/D
conversion. Therefore, total of 50 clocks are required to complete an 10-bit conversion: When fxx/8 is selected
for conversion clock with an 8 MHz fxx clock frequency, one clock cycle is 1 us. Each bit conversion requires 4
clocks, the conversion rate is calculated as follows:
4 clocks/bit × 10 bits + set-up time = 50 clocks, 50 clock × 1us = 50 us at 1 MHz
A/D CONVERTER CONTROL REGISTER (ADCON)
The A/D converter control register, ADCON, is located at address F7H in set 1, bank 0. It has three functions:
— Analog input pin selection ( bits 4, 5, and 6 )
— End-of-conversion status detection ( bit 3)
— A/D operation start or enable ( bit 0 )
After a reset, the start bit is turned off. You can select only one analog input channel at a time. Other analog
input pins (ADC0–ADC7) can be selected dynamically by manipulating the ADCON.4–6 bits. And the pins not
used for analog input can be used for normal I/O function.
15-2
A/D Converter Control Register (ADCON)
F7H, Set 1, Bank 1, R/W (EOC bit is read-only)
MSB
.7
.6
.5
Always logic zero
A/D input pin selection bits:
.6.5.4
A/D input pin
000
ADC0
001
ADC1
010
ADC2
011
ADC3
100
ADC4
101
ADC5
110
ADC6
111
ADC7
Figure 15-1. A/D Converter Control Register (ADCON)
S3C8248/C8245/P8245/C8247/C8249/P8249
.4
.3
.2
.1
Clock Selection bit:
.2.1 Conversion CLK
00
f
/16
XX
01
f
/8
XX
10
f
/4
XX
11
f
/1
XX
End-of-conversion bit
0 = Conversion not complete
1 = Conversion complete
.0
LSB
Start or enable bit
0 = Disable operation
1 = Start operation
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