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Samsung S3C8248 User Manual page 80

8-bit cmos

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S3C8248/C8245/P8245/C8247/C8249/P8249
SIOCON
— SIO Control Register
Bit Identifier
RESET Value
RESET
Read/Write
Addressing Mode
.7
.6
.5
.4
.3
.2
.1
.0
.7
.6
1
0
R/W
R/W
Register addressing mode only
SIO Shift Clock Selection Bit
0
Internal clock (P.S clock)
1
External clock (SCK)
Data Direction Control Bit
0
MSB-first mode
1
LSB-first mode
SIO Mode Selection Bit
0
Receive-only mode
1
Transmit/receive mode
Shift Clock Edge Selection Bit
0
Tx at falling edges, Rx at rising edges
1
Tx at rising edges, Rx at falling edges
SIO Counter Clear and Shift Start Bit
0
No action
1
Clear 3-bit counter and start shifting
SIO Shift Operation Enable Bit
0
Disable shifter and clock counter
1
Enable shifter and clock counter
SIO Interrupt Enable Bit
0
Disable SIO Interrupt
1
Enable SIO Interrupt
SIO Interrupt Pending Bit
0
No interrupt pending
0
Clear pending condition (when write)
1
Interrupt is pending
.5
.4
0
0
R/W
R/W
R/W
CONTROL REGISTER
FOH
Set 1, Bank 0
.3
.2
.1
0
0
0
R/W
R/W
.0
0
R/W
4-35

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C8245P8245C8249C8247P8249