Advertisement
16-BIT TIMER 0/1
BLOCK DIAGRAM
f
/1024
XX
f
/256
XX
f
/64
XX
f
/8
XX
f
/1
XX
T1CLK
V
SS
M
U
X
T1CAP
T1CON.4-.3
NOTES:
1.
16-bit PWM frequency. Where 10 MHz clock is used and fxx/8 is selected,
PWM frequency = 1 / { (8/10 MHz) x FFFFh } = 19.07 Hz
2.
Timer 1 input clock must be slower than CPU clock.
12-8
T1CON.7-5
M
16-bit Up-Counter
U
X
16-bit Comparator
Timer 1 Buffer Reg
Timer 1 Data H/L
Pending
Pending bit is located at INTPND register
Figure 12-6. Timer 1 Functional Block Diagram
OVF
Data Bus
8
R
(Read Only)
Counter Clear Signal or Match
Register
8
Data Bus
S3C8248/C8245/P8245/C8247/C8249/P8249
T1CON.0
Pending
T1CON.2
Clear
M
U
Pending
Match
X
T1CON.4-.3
T1OVF
IRQ3
T1CON.1
T1INT
IRQ3
T1OUT
T1PWM
Advertisement
