Samsung S3C8248 User Manual page 64

S3C8248/C8245/P8245/C8247/C8249/P8249
P0CONL
— Port 0 Control Register (Low Byte)
Bit Identifier
RESET Value RESET
Read/Write
Addressing Mode
.7–.6
.5–.4
.3–.2
.1–.0
.7 .6
0 0
R/W R/W
Register addressing mode only
P0.3/INT3
0 0 Schmitt trigger input mode; pull-up ; interrupt on falling edge
0 1 Schmitt trigger input mode; interrupt on rising edge
1 0 Schmitt trigger input mode; interrupt on rising or falling edge
1 1 Output mode, push-pull
P0.2/INT2
0 0 Schmitt trigger input mode; pull-up ; interrupt on falling edge
0 1 Schmitt trigger input mode; interrupt on rising edge
1 0 Schmitt trigger input mode; interrupt on rising or falling edge
1 1 Output mode, push-pull
P0.1/INT1
0 0 Schmitt trigger input mode; pull-up ; interrupt on falling edge
0 1 Schmitt trigger input mode; interrupt on rising edge
1 0 Schmitt trigger input mode; interrupt on rising or falling edge
1 1 Output mode, push-pull
P0.0/INT0
0 0 Schmitt trigger input mode; pull-up ; interrupt on falling edge
0 1 Schmitt trigger input mode; interrupt on rising edge
1 0 Schmitt trigger input mode; interrupt on rising or falling edge
1 1 Output mode, push-pull
.5 .4
0 0
R/W R/W R/W
CONTROL REGISTER
E1H Set 1, Bank 0
.3 .2 .1
0 0 0
R/W R/W
.0
0
R/W
4-19