Hitachi SH7750 Programming Manual page 357

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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Operation
OR(long m, long n) /* OR Rm,Rn */
{
R[n]|=R[m];
PC+=2;
}
ORI(long i)
/* OR #imm,R0 */
{
R[0]|=(0x000000FF & (long)i);
PC+=2;
}
ORM(long i) /* OR.B #imm,@(R0,GBR) */
{
long temp;
temp=(long)Read_Byte(GBR+R[0]);
temp|=(0x000000FF & (long)i);
Write_Byte(GBR+R[0],temp);
PC+=2;
}
Example
OR
R0,R1
OR
#H'F0,R0
#H'50,@(R0,GBR) ;Before execution (R0,GBR) = H'A5
OR.B
;Before execution R0 = H'AAAA5555, R1 = H'55550000
;After execution
R1 = H'FFFF5555
;Before execution R0 = H'00000008
;After execution
R0 = H'000000F8
;After execution
(R0,GBR) = H'F5
Rev. 2.0, 03/99, page 343 of 396

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