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10.70
OCBI
Cache Block Invalidation
Format
OCBI @Rn
Description
This instruction accesses data using the contents indicated by effective address Rn. In the case of a
hit in the cache, the corresponding cache block is invalidated (the V bit is cleared to 0). If there is
unwritten information (U bit = 1), write-back is not performed even if write-back mode is selected.
No operation is performed in the case of a cache miss or an access to a non-cache area.
Operation
OCBI(int n)
{
invalidate_operand_cache_block(R[n]);
PC+=2;
}
Possible Exceptions:
• Data TLB miss exception
• Data TLB protection violation exception
• Initial page write exception
• Address error
Note that the above exceptions are generated even if OCBI does not operate.
Operand Cache Block
Invalidate
Summary of Operation
Operand cache block
invalidation
/* OCBI @Rn */
Data Transfer Instruction
Instruction Code
0000nnnn10010011 1
Rev. 2.0, 03/99, page 339 of 396
Execution
States
T Bit
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