Fsqrt - Hitachi SH7750 Programming Manual

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
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10.43

FSQRT

Floating-Point
Square Root
PR
Format
0
FSQRT FRn
1
FSQRT DRn
Description
When FPSCR.PR = 0: Finds the arithmetical square root of the single-precision floating-point
number in FRn, and stores the result in FRn.
When FPSCR.PR = 1: Finds the arithmetical square root of the double-precision floating-point
number in DRn, and stores the result in DRn.
When FPSCR.enable.I is set, an FPU exception trap is generated regardless of whether or not an
exception has occurred. When an exception occurs, correct exception information is reflected in
FPSCR.cause and FPSCR.flag, and FRn or DRn is not updated. Appropriate processing should
therefore be performed by software.
Operation
void FSQRT(int n){
pc += 2;
clear_cause();
switch(data_type_of(n)){
case NORM
case DENORM:
case PZERO :
case NZERO :
case PINF
case NINF
case qNaN
case sNaN
}
}
void normal_fsqrt(int n)
Floating-point SQuare RooT
Summary of Operation
√FRn → FRn
√DRn → DRn
:
if(sign_of(n) == 0) normal_ fsqrt(n);
else
invalid(n); break;
if(sign_of(n) == 0) set_E();
else
invalid(n); break;
:
break;
:
invalid(n); break;
:
qnan(n);
:
invalid(n); break;
Floating-Point Instruction
Instruction Code
1111nnnn01101101 9
1111nnnn01101101 22
break;
Rev. 2.0, 03/99, page 283 of 396
Execution
States
T Bit

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