Rcr Receiver Frame Sync Length (Rfsl) - Bit 15 - Motorola DSP56367 User Manual

24-bit digital signal processor
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Table 10-11 ESAI Receive Slot and Word Length Selection (Continued)
RSWS4
RSWS3
1
1
1
0
1
0
0
1
1
1
0
1
0
1
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
1
10.3.4.10

RCR Receiver Frame Sync Length (RFSL) - Bit 15

The RFSL bit selects the length of the receive frame sync to be generated or recognized. If
RFSL is cleared, a word-length frame sync is selected. If RFSL is set, a 1-bit clock period
frame sync is selected. See Figure 10-7 for examples of frame length selection.
10.3.4.11
RCR Receiver Frame Sync Relative Timing (RFSR) - Bit 16
RFSR determines the relative timing of the receive frame sync signal as referred to the serial
data lines, for a word length frame sync only. When RFSR is cleared the word length frame
sync occurs together with the first bit of the data word of the first slot. When RFSR is set the
word length frame sync starts one serial clock cycle earlier (i.e. together with the last bit of the
previous data word).
10.3.4.12
RCR Receiver Section Personal Reset (RPR) - Bit 19
The RPR control bit is used to put the receiver section of the ESAI in the personal reset state.
The transmitter section is not affected. When RPR is cleared, the receiver section may operate
normally. When RPR is set, the receiver section enters the personal reset state immediately.
When in the personal reset state, the status bits are reset to the same state as after hardware
reset.The control bits are not affected by the personal reset state.The receiver data pins are
disconnected while in the personal reset state. Note that to leave the personal reset state by
MOTOROLA
RSWS2
RSWS1
RSWS0
0
0
1
0
0
1
1
1
1
1
0
1
1
1
0
0
0
1
1
0
1
1
1
1
0
0
0
1
0
1
1
0
1
0
DSP56367
Enhanced Serial Audio Interface (ESAI)
ESAI Programming Model
SLOT LENGTH
0
32
1
0
1
1
1
Reserved
0
1
1
0
0
1
1
0
1
0
1
WORD LENGTH
8
12
16
20
24
10-33

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