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18.5 Operation of Expanded I/O Serial Interface
The expanded I/O serial interface consists of the serial mode control status register
(SMCS) and shift register (SDR). This interface is used for input and output of 8-bit
serial data.
This section describes the operations of the expanded I/O serial interface.
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Overview of operation for expanded I/O serial interface
Input and output with serial data are individually performed as follows:
❍ Serial data input
By synchronizing with the rising edge of a serial shift clock (external or internal clock), data is
input to the SDR (serial data register) from a serial input pin (Pin SIN1).
The shift direction (data transfer beginning with the MSB or LSB) is specified by the direction
specify bit (BDS) of the serial mode control status register (SMCS).
After data transfer is completed, the operation enters the stop state or data register R/W wait
state as determined by the MODE bit of the serial mode control status register (SMCS). To
change the state from each state to transfer state, to do the following setting.
•
To return from the stop state, write "0" to the STOP bit and write "1" to the STRT bit to set it.
(STOP and STRT can be set simultaneously)
•
To return from the wait state, perform a read or write operation for the data register.
❍ Serial data output
By synchronizing the shift register with the falling edges of a serial shift clock (external or
internal clock), data is output from the serial output pin (SOT1 pin).
CHAPTER 18 EXPANDED I/O SERIAL INTERFACE
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