Table of Contents
Advertisement
12.5.4 Free-running timer timing
The free-running timer is incremented according to the timing of input clock (internal
or external clock). If an external clock is selected, counting is performed at the rising
edge.
■
Count timing of free-running timer
Figure 12.5-6 shows the count timing of the free-running timer.
φ
External clock input
Count clock
Counter value
The counter is cleared by a reset, clearing by software, or a match with compare register 0 and
free-running timer. Counter clear by a reset or software occurs when a clear operation is
performed. Counter clear because of a match with compare register 0 occurs in sync with count
timing.
■
Clear timing of free-running timer (match with compare register 0)
Figure 12.5-7 shows the clear timing of the free-running timer caused by a match with compare
register 0.
Figure 12.5-7 Clear timing of free-running timer (match with compare register 0)
Compare register value
Compare match
Counter value
Figure 12.5-6 Count timing of free-running timer
φ
N
CHAPTER 12 16-BIT INPUT/OUTPUT TIMER
N
N
N+1
0000
243
Advertisement
Table of Contents
